As integrated circuit (IC) scaling proceeds into the deep sub-nanometer regime, the number of transistors on high performance, high density ICs is in the tens of millions, in accordance with the historical trend of Moore's Law. This has necessitated scaling down respective interconnection structures of the IC accordingly. In particular, tungsten (W) has been used for the interconnection structures (e.g., contact plugs, vias, and other interconnection lines, etc.) that are relatively closer to respective transistors of the IC. This is partially because copper (Cu), which is typically used for another major portion of the interconnection structures that are relatively farther from the transistors, may “poison” the transistors. For brevity, such tungsten interconnection structure are herein collectively referred to as “tungsten contacts.”
Such tungsten contacts are usually formed using fluorine-based (F-based) chemical vapor deposition (CVD) techniques to overlay an active feature of the transistor, which is typically formed of silicon, with tungsten-based material (e.g., tungsten atoms). In general, the F-based CVD techniques inevitably induces fluoride atoms to attack the active feature formed of silicon. In this regard, one or more barrier layers formed of titanium (Ti)-based and/or tantalum (Ta)-based materials or alloys (e.g., Ti, Ta, TiN, TaN, and combinations thereof), serving as a fluoride barrier layer, are formed to cover the active feature prior to forming the tungsten contact.
As mentioned above, the interconnection structures, including the tungsten contacts, are scaled down in accordance with the Moore's Law. However, such fluoride barrier layers cannot be scaled down accordingly. Thus, existing tungsten contacts and the methods forming the same are not entirely satisfactory.